Job information
About this opportunity
Quick summary
Job Responsibility:
-Contribute to SoC DFT design activities by running DFT pattern simulations, static and dynamic checks and documentation.
-Assist with DFT AI Flow development under guidance from senior engineers.
-Contribute to engineering quality, learning, and teamwork throughout the development cycle.
Requirements:
-Currently pursuing a Master’s degree in Electrical Engineering, Electronics, Computer Engineering, Computer Science or a related discipline.
-Hands-on experience from ASIC EDA tools, SoC design projects, internships, coursework, or student competitions is a plus.
-Familiar with SoC digital design, verification, programming, EDA tools; willingness to learn quickly is important.
-Strong foundation in engineering fundamentals, problem solving, testing, and technical documentation.
-Able to collaborate with cross-functional teams and communicate technical ideas clearly.
-Good communication skills in English (written and spoken).
Listing details
- Employer
- NXP Semiconductors
- Location
- Tianjin (Teda), China
- Structured address
- Tianjin (Teda)
- Category
- Engineering
- Base salary
- Not disclosed
- Valid through
- Check official source
- Reference
- R-10066777